key features auto-selectable lvd or single-ended termination 3.0pf maximum disabled output capacitance fast response, no external capacitors required compatible with active negation drivers 15a supply current in disconnect mode logic command disconnects all termination lines diffsense line driver ground driver integrated for single-ended operation current limit and thermal protection hot-swap compatible (single-ended) compatible with scsi, spi-2, spi-3, spi-4 ultra160 and ultra320 pin compatible with ds2119 block diagram 9-line ul 9-line ul tra3 l tra3 l vd/se vd/se scsi t scsi t er er minat minat or or the iMP2119 is a multimode scsi terminator that conforms to the scsi parallel interconnect-2 (spi-2) specification developed by the t10 stan- dards committee for low voltage differential (lvd) termination. multimode compatibility permits the use of legacy devices on the bus without hardware alterations. automatic mode selection is achieved through voltage detection on the diffsense line. the iMP2119 delivers the ultimate in scsi bus performance while saving component cost and board area. elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. the indi- vidual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. the high bandwidth architecture insures ultra3 performance. when the iMP2119 is enabled, the differential sense (diffsense) pin supplies a voltage between 1.2v and 1.4v. in application, this pin is tied to the diffsense input of the corresponding lvd transceivers. this action enables the lvd transceiver function. diffsense is capable of supplying a maximum of 15ma. tying the diffsense pin high places the iMP2119 in a high impedance state indicating the presence of an hvd device. tying the pin low places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single- ended mode. recognizing the needs of portable and configurable peripherals, the iMP2119 have a ttl compatible sleep/disable mode. during this sleep/disable mode, power dissipation is reduced to a meager 15 a while also placing all outputs in a high impedance state. also during sleep/disable mode, the diffsense function is disabled and is placed in a high impedance state. another key feature of the iMP2119 is the master/slave function. driving this pin high or floating the pin enables the 1.3v diffsense reference. driving the pin low dis- ables the on board diffsense reference and enables use of an external master reference device. power on & mode delay internal v ref 1.30v lvd 1.25v 200 52.5 1.07ma 1.07ma 20 52.5 se 2.2v power on power on se 2.85v, 22.5ma latch se disc/hvd lvd se lvd(-) / se 1 of 9 lvd(+) / se (pseudo-gnd) se hvd lvd hvd diff _ c a p diffsense m/s i so t pwr lvd window comp. lvd se 10ma hvd 20k ? mode control & delay 5241/42 01 eps imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9 ?200 2 im p , inc. data communications 1 d at a c ommuni c a tions
2 408-432-9100/ww w .impweb.com ?200 2 im p , inc. ordering information absolute maximum ratings 1 thermal data pin configuration termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . +7v operating junction temperature plastic (db, pw packages) . . . . . . . . . . . . . 150 c storage temperature range . . . . . . . . . . . . . . ?5 c to 150 c note: 1. exceeding these ratings could cause damage to the device. all voltages are with respect to ground. currents are positive into, negative out of the specified terminal. lead temperature (soldering, 10 sec.) . . . . . . 300 c pw package: thermal resistance junction-to-ambient, ja . . . . . . 100 c/w 1 2 3 4 28 27 26 25 5 6 7 8 nc r 1 p r 1n r 2p r 2 n h s gnd r 3 p r 3n t p wr nc r 9 n r 9 p r 8 n r 8 p h s g nd r 7 n 24 23 22 21 9 10 20 19 11 12 13 14 r 4 p r 4 n r 5 p r 5 n is o gnd r 6n r7p r 6 p diff _ cap diffsense master/slave 18 17 16 15 iMP2119 tssop-28 junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performance of the device/pc-board system. no ambient airflow is assumed. rebmuntra pe gnarerutarepme te gakcap wpc9112pm i0 0 7ot c c p osstcitsalpnip-82 )t/wpc9112pmi.e.i(.rebmuntrapot t rettelehtdneppa,leerdnaepatrof:eton spe.20t_24/1425 pw package imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
pin description ?200 2 im p , inc. data communications 3 eman n i pn oitcnuf , r ( 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 ) n . edomes r o fse n i ln o i t a n im r e t l an g i s . edomdvl r o fse n i ln o i t a n im r e t l an g i se v i t agen r ( 1 ,2 , 3 , 4 , 5 , 6 , 7 , 8 ) p . edomes r o fse n i ldnu o r g - oduesp . edomdvl r o fse n i ln o i t a n im r e t l an g i se v i t i sop t p wr e n oybdelpuocedebtsum.rwpmretsubiscsottcennoc.rotanimretrofnipylppusrewop 7.4 otyrassecenyletulosbasiti.secivedrotanimreteerhtyreverofroticapacrse-wolf .)bcpnosecartgib(ecnadepmiwolyrevahguorhtroticapacgnilpuocedehtotnipsihttcennoc t p w r ehtotsroticapacgnilpuocedehtmorftrohsyrevsecnatsidgnipeek . l a c i t i r co s l asinip snoitacilppaemosdnatnadnepedtuoyaltahwemossiroticapacgnilpuocedehtfoeulaveht 1.0lanoitiddanamorftifenebyam tp w r ehttaroticapacgnilpuocedf . n i p o s i e l s velcigolrof2elbatees.rotanimretselbasid/selbane dn g. dnuorgottcennoc.nipdnuorgrotanimret evals/retsam . ecivedgnillortnocehtsirotanimrethcihwtcelesotdesu.nips/msaotderrefersemitemos .1elbatees.evirdtuptuoesnesffidehtselbaneneporohgihnipevals/retsam esnesf f id o tnipesnesehtoslasiti.enilsnesffidsubiscsehtsevirdti.nipnoitcnuflaudasisiht ahtiwdelbasidebnacevirdtuptuoesnesffid.)dvhroes,dvl(edomsubiscsehttceted ffidotdetcennocyllanretni.2elbatdna1elbatees.nipevals/retsamehtnolevelwol _ ca p p i n tr ou gh 20 k oh ms re si s to r . _ ca p ffid k02hguorhtnipesnesffidotdetcennocyllanretni ? esnesedomasadesuebnacti.rotsiser retlifcrna.)wolsinipevals/retsam(rotanimretgnillortnoc-nonasiecivedehtnehw n i p k0 2 ( ? 1 . 0/ . r em i t l a n r e t n inasah t isa , 2 1 1 9 pmiehtnoderiuqertonsi)f n . c . n o connect. pins should be left open. imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
4 408-432-9100/ww w .impweb.com ?200 2 im p , inc. unless otherwise specified, these specifications apply over the operating ambient temperature range of 0 c t a 70 c. termpwr = 4.75v. iso : imp2 1 19 = lo w . low duty cycle pulse testing techniques a r e used which maintain junction and case temperatures equal to the ambient temperature. retemara pl obmy sn i mp y tx a ms tinu egatlovrwpmre td v lv mret 0. 35 2. 5v e s5 . 35 2.5 egatlovenillangis 00 . 5v egatlovtupnitcennocsid 0v mret v egnarerutarepmetnoitcnujlautrivgnitarepo 00 7 c .lanoitcnufsiecivedehthcihwrevoegnar.2:eton spe.30t_24/1425 retemara pl obmy sn oitidno cn i mp y tx a ms tinu noitcesrotanimretdvl tnerrucylppusrwpmre td vl cci nepo=senilrotanimretll a5 20 3a m v 0 . 2 i s o > 15 3 a egatlovedomnommo cv mc 521. 15 2. 15 73. 1v egatlovtesff ov bsf )3etonees(+dna neewtebtiucricnep o0 0 12 1 15 2 1v m rotanimretlaitnereffi de cnadepm iz d v tuo v1otv1 =laitnereffi d0 0 15 0 10 11 ? ecnadepmiedomnommo cz mc v5.2otv 00 0 10 0 20 03 ? ecnaticapac t u p t u oc o 0 . 2 . 0 v > o s i 5 . 2f p egakaeltuptu oi kael v 0 . 2>i s o 2 a v en i l t,v4otv0= a 2 =5 c v 0 . 2 i s o > 1 t p wr v,v0= en i l v7.2= yaledegnahcedo mt fd v0otv4.1=esnesffi d5 1 1s m noitcesesnesffid egatlovtuptuoesnesffi dv ffid 2. 13 . 14 . 1v tnerrucecruostuptuoesnesffi di ffid v ffid v0 =0 . 50 .5 1a m tnerrucknisesnesffi di )ffid(kn i s v f f id v5 7 . 2 =0 02 a egakael t u p t uoesnesf f i di ) f f id(kael v 0 . 2>i s o 0 1 a t a 2 =5 c noitcesrotanimretdedne-elgnis tnerrucylppusrwpmre ti es cc ,nepo=senilrotanimretll ae vals/retsa mv 0 =70 1a m ,v2.0=senilrotanimretll ae vals/retsa mv 0 =4 1 26 22 v0.2>tcennocsi d5 15 3 a egatlovhgihtuptuorotanimre tv o 6. 25 8. 2v tnerructuptu oi o v tuo v2.0 =1 2324 2a m tnerruck n i si knis v tuo senillla,v4 =5 45 6a m ecnaticapactu p t u oc o v 0 . 2>i s o 5 . 2f p tnerrucegakae li kael v 0 . 2>i s o 2 a v tuo t,v4otv0= a 2 =5 c v 0 . 2 is o > i t pw r ,v0= enil t,v7.2= a 2 =5 c ecnadepmirevirddnuor gz g am1= i0 01 ? nwodtuhslamreht 05 1 c recommended operating conditions 2 electrical characteristics note: 3. open circuit fallsafe voltage. imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
?200 2 im p , inc. data communications 5 retemara pl obmy sn oitidno cn i mp y tx a ms tinu o s ec t io n si o th re s ho ld s si v ht 8 . 00 . 2v t n e r r uc t up n ii l i 0 v =o s i 0 1 a i hi o = 2. 4 v s i 0 0 1a n noitcesevals/retsam sdlohserhtevals/retsa mv )sm(ht 8 . 00 . 2v tnerructupn ii )sm(li v0=evals/retsa m0 1 a i )sm(li v4.2=evals/retsa m0 0 1a n 3ta.50t_24/1425 electrical characteristics imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
6 408-432-9100/ww w .impweb.com ?200 2 im p , inc. iMP2119 iMP2119 5241/42_06.eps ++ figure 1. bus voltage figure 2. v od v (+) v ( ) v cm 5241/42_04.eps v od = v ( ) v (+) , logic = 0 negated 100mv 100mv 0v 5241/42_05.eps figure 3. evals/retsa ms utatsesnesffi dt nerructuptuo * lz i ha m0 hv 3. 1e cruosam51 )pu-llup(nep ov 3. 1e cruosam51 .etatsenilesnesffidehttcetedlliwrotanimreteht,etatswolehtninehw* 3ta.60t_24/1425 table 1. master/slave function table table 2. diffsense/power up/power down function table 9112pmi tcennocsi de snesffid stuptuo tnerruc sutat se pyt lv 5.0< le lban ee sa m7 lv 9.1otv7. 0e lban ed v la m12 lv 4.2> he lbasi dz i ha m1 hxe lbasi dz i h0 1 a nep oxe lbasi dz i h0 1 a spe.70t_24/1425 application information imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
?200 2 im p , inc. data communications 7 application information 1 t p wr i so t p w r iso m /s gnd nc* nc* pin 1 1+ 9 data lines (9) data lines (9) data lines (9) 9+ diffsense diff _ c a p * 20k iMP2119 1 t p w r 4.7 f i so m/s gnd 1+ 9 9+ diffsense diff _c ap * iMP2119 1 tp wr is o m/s gnd 1+ 9 9+ diffsense diff _c ap * iMP2119 1 t p w r is o t pwr i so m/s gnd 1+ 9 9+ diffsense diff _c a p * iMP2119 host peripheral 1 t pw r 4.7 f is o m/s gnd 1+ 9 9+ diffsense diff _c ap * iMP2119 1 t p wr is o m/s gnd 1+ 9 9+ diffsense diff _c a p * * the capacitor on pin 1 can be placed on the iMP2119cpw. this capacitor is not required with imp devices. iMP2119 + + 4.7 f* + pin 1 4.7 f* + 0.1 f + 0.1 f + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + 20k figure 5. suggested iMP2119 universal application schematic imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
8 408-432-9100/ww w .impweb.com ?200 2 im p , inc. sehcn is retemillim ni mx a mn i mx am )nip-82()posst(eniltuoknirhsllamsniht a2 30 .1 40 .0 8. 05 0.1 b7 00. 02 10. 09 1. 00 3.0 c5 300. 09 700. 09 0. 00 2.0 d8 73. 06 83. 00 6. 90 8.9 e9 61. 06 71. 00 3. 45 .4 fc sb520. 0c sb56.0 g2 00. 05 00. 05 0. 05 1.0 h 740.0 02.1 l7 10. 00 30. 05 4. 05 7.0 m 0 8 0 8 p6 42. 06 52. 05 2. 60 5.6 cl* 400.0 01.0 *. ytiranalpocdael spe.10t_24/1425 321 ep d seating plane b g a h f e l 24-pin (tssop).eps c m thin small shrink outline (tssop) (28-pin) pw package dimensions imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
imp, inc. corporate headquarters 2830 n. first street san jose, ca 95134-2071 tel: 408-432-9100 fax: 408-434- 1 0 85 e-mail: info@impinc.com http://www.impweb.com the imp logo is a registered trademark of imp, inc. all other company and product names are trademarks of their respective owners. ? 200 2 im p , inc. printed in usa publication #: 7001 revision: c issue date: 11/01/01 type: product imp2 imp2 1 1 1 1 9 9 imp2 imp2 1 1 1 1 9 9
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